APPcache+: An STT-MRAM-Based Approximate Cache System With Low Power and Long Lifetime

Abstract

Due to high static power and low scalability, the traditional SRAM-based cache is not a good solution for image processing applications. Emerging Spin Transfer Torque Magnetic RAM (STT-MRAM) is a promising candidate for cache due to its low leakage power and high density. However, STT-MRAM suffers from high write energy. Therefore, by making use of the ability of tolerating minor errors in image processing applications, this work presents an STT-MRAM based APProximate cache architecture (APPcache+) to write/read approximate data, which can largely reduce the cache energy and improve the STT-MRAM lifetime. APPcache+ includes three main designs. Firstly, we find that there are many similar elements (e.g., pixels in images) in cache lines. Therefore, APPcache+ presents several lightweight similarity-based encoding techniques to remove redundant elements, thus shortening the data size and reducing the energy of STT-MRAM cache. Secondly, we design a partial read scheme to reduce the read energy of the STT-MRAM cache. In the traditional decompression process, the whole line is fetched into the decompressor, leading to unnecessary read energy. The partial read scheme can largely reduce read energy while keeping the overhead low. Thirdly, we observe the encoding schemes may lead to bit write imbalance. Therefore, we propose a lightweight Ping-Pong intra-line wear-leveling scheme to improve the lifetime. Compared with the baseline, extensive evaluation results show that our APPcache+ can largely reduce the overall energy by 32.58%, improve lifetime by 40.7% with only 2.2% performance degradation and 1.86% output quality loss.