Annealing technology under arsenic overpressure for GaAs LSI — influence on dislocation and threshold voltage: T EGAWA, Y SANO, H NAKAMURA, K KAMINISHI (Res. Lab.. Oki Electr. Ind. Co. Ltd., Hachioji, Japan) Electron. Commun. Jpn. 2. Electron. (USA), vol. 71, no. 4, pp. 10–18 (April 1988)

doi:10.1016/0026-2692(89)90050-5

Annealing technology under arsenic overpressure for GaAs LSI — influence on dislocation and threshold voltage: T EGAWA, Y SANO, H NAKAMURA, K KAMINISHI (Res. Lab.. Oki Electr. Ind. Co. Ltd., Hachioji, Japan) Electron. Commun. Jpn. 2. Electron. (USA), vol. 71, no. 4, pp. 10–18 (April 1988)

https://doi.org/10.1016/0026-2692(89)90050-5

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Journal: Microelectronics Journal

Publication Date: Sep 1, 1989

#Threshold Voltage #GaAs LSI + Show 1 more

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Annealing technology under arsenic overpressure for GaAs LSI — influence on dislocation and threshold voltage: T EGAWA, Y SANO, H NAKAMURA, K KAMINISHI (Res. Lab.. Oki Electr. Ind. Co. Ltd., Hachioji, Japan) Electron. Commun. Jpn. 2. Electron. (USA), vol. 71, no. 4, pp. 10–18 (April 1988)

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