Abstract

In this work, we present a machine-learning augmented compact modeling framework for modeling process induced variations in advanced semiconductor devices. The framework employs BSIM-CMG unified compact model at the core and can be used for any advanced devices like GAA nanosheets and nanowires, FinFETs etc. We have validated the model with extensive numerical simulations and experimental data such as 14nm technology FinFET and 24nm technology Nanowire. Our results show excellent accuracy in modeling variability in key electrical parameters of the device including off-current (Ioff), on-current (Ion), threshold voltage (Vth), subthreshold swing (SS) etc. We observe that the overall accuracy of the ML-based framework strongly depends on the nature and physical behavior of the core model used for modeling the nominal device.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.