Anisotropic high-k deposition for gate-last processing of metal-oxide-semiconductor field-effect transistor utilizing electron-cyclotron-resonance plasma sputtering

Abstract

A high-k/metal gate structure has been investigated for application to state-of-the-art metal-oxide-semiconductor field-effect transistors. In the high-k/metal gate structure, the 32-nm technology node was realized by using the high-k-last, metal-last integration process. We investigated anisotropic deposition for 3-dimensional gate structures on Si substrates utilizing electron-cyclotron-resonance plasma sputtering to reduce parasitic capacitance. Anisotropic HfN film deposition was realized and the deposition thickness on the side wall was reduced with decreasing sputtering gas pressure, from 0.15 to 0.06Pa, corresponding to Ar/N2 flow ratios of 20/1 and 5/1sccm. The HfSiON gate insulator formed from the anisotropically deposited HfN film showed an equivalent-oxide-thickness of 2.1nm and a gate leakage of 3.1×10−6A/cm2 @VFB-1.0.