Analytical one-dimensional current-voltage model for FD SOI MOSFETs including the effect of substrate depletion

Abstract

In this paper, we present an analytical one-dimensional current-voltage model for silicon-on-insulator (SOI) MOSFETs under full depletion (FD). Our model has been developed from the first principles, and it not only includes the effects of source-drain series resistances, self-heating, and parasitic BJT, which are essential to FD SOI device modeling, but also includes another important effect of substrate depletion, for the first time in the literature, which is of vital significance for FD SOI devices having small film thickness and low substrate doping. The results of the drain current obtained from our model show a much better match with the experimental data, with the maximum error being only 9.41%, which is reasonably lower than the maximum error of 15.04% produced by the model of Yu et al., and marginally better than the error of 11.5% of the model of Hu and Jang. It must be noted that, though the improvements achieved in terms of accuracy are not that significant, yet unlike other models, ours is based on a simplified one-dimensional analytical approach, which is absolutely free from iterations, and hence, there is a huge improvement in terms of computational efficiency, which establishes its practical significance.