Analytical modeling and numerical simulation of novel double-gate InGaAs vertical nanowire transistor device for threshold voltage tuning and improved performance

Abstract

This paper proposes a novel cylindrical double gate In0.53Ga0.47As vertical Nanowire n type device, which offers a higher drive current, better channel potential controllability and reduced short channel effects at ultra-short channel length 14nm through numerical simulation approach. An independent inner gate control is used for threshold voltage tuning. Improvement of drive current in the Double-Gate Vertical Nanowire Transistor (DG-VNWT) structure is achieved by growing the In0.53Ga0.47As Nanowire vertically on silicon substrate. Further to reduce the leakage current of the structure, we propose high-k LaAlO3 outer gate stack in integration with Al2O3 passivation layer and WN metal gate for the first time. Variable threshold voltage tuning is also achieved by inner gate control of the proposed device. An analytical model is built for validating threshold voltage dependence on inner gate voltage. Our results of the analytical model are observed to be at par with TCAD simulations. The proposed DG-VNWT device is compatible with silicon and high-k/metal gate CMOS technology with the unique capability of inner and outer gate control, the most promising scalable candidate for low power applications.