Analysis of Steady State Detection of Resistive Bridging Faults in BiCMOS Digital ICs

Abstract

This paper analyzes the effects induced on the electrical behavior of BiCMOS digital circuits by bridging faults, whose instrinsic resistance value is shown to have a strong impact on the static behavior of faulty gates and of their fan-out gates. The problem of fault detection is then addressed considering two different testing techniques (current monitoring and functional testing). Simulations of the electrical behavior of faulty BiCMOS circuits have enlightened the main differences with respect to the CMOS technology: the larger driving capability of BJTs with respect to MOSFETs makes the detection of bridging faults much more difficult in BiCMOS circuits when functional testing is considered, but more effective when current monitoring is used.