Abstract

After a survey of the electrical characteristics for vertical injection logic (v.i.l.) structure compared with the conventional i.i.l. structure, static characteristics and dynamic behaviour for the v.i.l. structure are analysed by using a simplified one-dimensional model, and experimental verifications are carried out. The analysis reveals that the minimum propagation delay time is determined by the cutoff frequency of the n-p-n transistor and the effective lifetime of holes injected into the epitaxial layer from the base. The bottom injector in the v.i.l. structure reduces the effective lifetime of the holes, which results in improved minimum propagation delay times. In addition, the improvement in the minimum propagation delay times due to a reduction in the effective lifetime is more pronounced when the cutoff frequency is higher. Experimental results show that the minimum propagation delay time for v.i.l. is improved by a factor of 1.6, as predicted from the analysis.

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