Abstract

In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50 K to 400 K) on the intrinsic carrier concentration (ni), electron concentration (n) and thereby on the threshold voltage (Vth) for thin silicon film (tsi = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (Vth) is defined as the gate voltage (Vg) at which the potential at the center of the channel (Φc) begins to saturate (Φc=Φc(sat)). It is shown that in the strong quantum confinement regime (tsi≤3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (ΔEg(eff)), intrinsic carrier concentration (ni), electron concentration (n), Φc(sat) and the threshold voltage (Vth). On the other hand, for tsi≥4 nm, it is shown that size quantization effects recede with increasing tsi, while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for Vth as a function of device temperature (T).

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