Abstract
Graphical abstractDisplay Omitted Highlights? Self-aligned multiple patterning (SAMP) techniques for scaling to 5nm are studied. ? It is shown that extra masks are required to solve the overlay challenges. ? SATP is most cost-effective as it allows fewer masks with 2-D design flexibility. ? SASP process will most likely reach the maximum cycles of frequency multiplication. ? It is unlikely to adopt SAOP or EUV+SADP process in VLSI manufacturing. Spacer based self-aligned multiple patterning (SAMP), when combined with 193nm immersion or EUV lithography, can potentially drive the resolution of IC features down to 5-nm half pitch. By designing various mandrel patterns which further define the route of the following spacers, some SAMP techniques are more capable of driving up the feature density, while some others are favorable to reduction of process complexity by using fewer masks and allowing 2-D design flexibility. In this paper, we shall present a general analysis of several key issues of SAMP techniques: resolution capability, process complexity, overlay requirement, and performance.
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