Analysis of power supply noise in AMS circuits including the effects of interconnects using estimation by inspection method

Abstract

This paper presents the analysis of on-chip analog and mixed signal (AMS) circuits in the presence of supply noise, on- and off-chip interconnect effects. The estimation-by-inspection method is extended to analyze the performance metrics of the AMS circuits. For the purpose of validation, two different examples are considered, designed in UMC 130 nm and Lfoundry 180 nm technology-nodes. The mean percentage error (MPE) between electronic design automation (EDA) simulations and analytical results using the proposed method is less than 10% for various performance metrics of an AMS system. A speed-up factor of 9 has been achieved using the proposed method as compared to the EDA simulations.