Analysis of Overlay Accuracy in 0.14 µm Device Fabrication using Synchrotron Radiation Lithography

Abstract

We applied synchrotron radiation lithography to the fabrication of a 0.14 µ m rule dynamic random access memory structure using high dielectric film capacitor and trench isolation techniques. An overlay accuracy of 80 nm was obtained. In order to clarify the contributions of the error causes to the overlay accuracy, we mathematically classified the overlay error into four components: rotation, translation, magnification and in-plane deformation (IPD). A rotation and translation error was estimated to be 38 nm. A wafer process-induced error such as a rotation and translation due to a degradation of the alignment mark worsens the overlay error by 33 nm. We have also found that the maximum magnification error including the mask magnification was 4 ppm and the magnification correction was necessary to achieve an overlay accuracy less than 50 nm. The IPD was estimated to be 60 nm, and the major cause was a mask overlay error. The analyzed results suggest that an IPD less than 30 nm and a rotation/translation component less than 30 nm are required to achieve an overlay error less than 50 nm.