Abstract

We present a novel test structure for the study of sidewall ohmic contacts to III–V fins for FinFETs. We apply it to the characterization of the impact of digital etch (DE), used to trim the fin width, and thermal annealing on the contact resistivity of Mo/ $\text{n}^{+}$ -InGaAs fin sidewall contacts. To obtain sidewall contacts, we leave in place the etch mask that is used to define the fins in a reactive ion etching process and deposit conformal Mo around them. We present a model that describes well the electrical characteristics of the test structure. In our results, we find that the specific acid that is used for DE or the number of DE cycles that are performed have a minor impact on contact resistivity. Thermal annealing is found to significantly improve the sidewall contact resistivity, with the best value of $3.7~ \pm ~0.2~ {\Omega } \cdot {\mu } \text{m}^{{2}}$ obtained after annealing at 400 °C. This is about three times higher than the reported contact resistivity for this contact technology with the contact wrapping around the top and the sidewall surfaces of fins, about $1.3~ {\Omega } \cdot {\mu }\text{m}^{{2}}$ . Also, we find that the width of the non-conductive region under the sidewall surface of Mo contact, which we term “deadzone,” can be significantly mitigated by thermal annealing. Our work highlights the importance of understanding sidewall ohmic contact formation for future high-performance InGaAs FinFETs.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call