Abstract
Method for characterization of electrical and trapping properties of multilayered high permittivity stacks for use in charge trapping flash memories is proposed. Application of the method to the case of multilayered HfO2/Al2O3 stacks is presented. By applying our previously developed comprehensive model for MOS structures containing high-κ dielectrics on the J-V characteristics measured in the voltage range without marked degradation and charge trapping (from −3 V to +3 V), several parameters of the structure connected to the interfacial layer and the conduction mechanisms have been extracted. We found that the above analysis gives precise information on the main characteristics and the quality of the injection layer. C-V characteristics of stressed (with write and erase pulses) structures recorded in a limited range of voltages between −1 V and +1 V (where neither significant charge trapping nor visible degradation of the structures is expected to occur) were used in order to provide measures of the effect of stresses with no influence of the measurement process. Both trapped charge and the distribution of interface states have been determined using modified Terman method for fresh structures and for structures stressed with write and erase cycles. The proposed method allows determination of charge trapping and interface state with high resolution, promising a precise characterization of multilayered high permittivity stacks for use in charge trapping flash memories.
Highlights
By applying our previously developed comprehensive model for MOS structures containing high-κ dielectrics on the J − V characteristics measured in the voltage range without marked degradation and charge trapping, several parameters of the structure connected to the interfacial layer and the conduction mechanisms have been extracted
High permittivity dielectric stacks are subject of particular interest as material for charge trapping flash memories [1,2,3]
Precise characterization of the trapping properties is required in order to describe correctly the functioning of the charge trapping memory devices
Summary
High permittivity (high-κ) dielectric stacks are subject of particular interest as material for charge trapping flash memories [1,2,3]. These improvements are explained by the modulation of charge distribution by bandgap engineering in trapping layer. In this work Al2O3/HfO2 nanolaminates as a promising solution for charge trapping flash memories are studied. In the present work our aim is to propose a method of characterization of trapping using sensitive nondestructive methods. For this purpose, a structure without blocking layer is used. Oxide and interface charge are characterized by using recently proposed modified Terman method [13]
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
