Abstract

We analyzed the carrier lifetime in a drift layer of 1.2 kV-class SiC p-n diodes to suppress bipolar degradation. According to the device simulation results, the required carrier lifetime in the drift layer was estimated to be shorter than 10 ns with a current density of 300 A/cm2 if the threshold hole density for the expansion of the stacking fault at the interface of the drift layer and substrate was 2 × 1016 cm−3. Numerical analysis revealed that to ensure a carrier lifetime shorter than 10 ns, the 1/e2 lifetime obtained by microwave photoconductivity decay (μ-PCD) measurements should be shorter than 7.2 ns. Experimental μ-PCD measurements showed that 1/e2 lifetimes obtained from the as-received epiwafer were much longer than 7.2 ns, and even after H+ implantation, high-temperature annealing, or electron irradiation, 1/e2 lifetimes were still long. Therefore, carrier lifetime control in the drift layer is not sufficient to suppress bipolar degradation, and a combination of carrier lifetime control with other methods is necessary for the fabrication of 1.2 kV-class SiC p-n diodes for the complete suppression of bipolar degradation at a current capacity of 300 A/cm2.

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