Abstract
We analyzed the shared voltages of multiple trench gaps on a silicon-on-insulator (SOI) substrate and showed the conditions for improving the breakdown voltage surrounded by these isolated structures. We introduced a unified impedance model instead of the capacitive model of trench gaps and determined the effective conditions for improving the breakdown voltage. The first condition is to reduce the impedance of trench gaps. In this case, the leak current gives a low limit of trench gap resistance. The second condition is to increase the substrate resistance. As silicon substrate resistance is not very high, this condition is not useful for the silicon substrate, but for other materials such as ceramics. We confirmed the effectiveness of these conditions from the simulation and experimental results of a fabricated chip.
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