Analysis of 6(4) - Valued Memory

M Guzan

doi:10.5755/j01.eee.20.6.7274

Abstract

The subject of the article is an analysis of multiple-valued memory, which, according to previously verified assumptions should contain up to 6 stable singularities and an unspecified number of undesirable stable limit cycles. Eigenvalues, however, suggested that instead of 6 stable singularities, the memory is characterized by only four of them. This fact was verified initially by trajectories and consequently also by the calculation of boundary surface section led exclusively through the “suspicious” singularities. The result of the analysis is probably the first reference of violated alternation of stable and unstable singularities in sequential circuit. DOI: http://dx.doi.org/10.5755/j01.eee.20.6.7274

Highlights

Binary logic is dominant nowadays, multiple valued logic (MVL) is still of interest as well
piece-wise linear (PWL) v-i characteristics of resonant tunneling diodes (RTDs) were enriched by one segment, which increased the number of singularities from 9 to 11
A surprising finding, was that, the models of memory cells are similar, there is a big difference between them. It rests in the absence of 2 stable singularities S2 and S5 and presented memory is only 4valued, but with up to 9 stable limit cycle (SLC) present (8 SLC were present in the previous memory in [21])

Summary

INTRODUCTION

Binary logic is dominant nowadays, multiple valued logic (MVL) is still of interest as well. The analysis of elemental MV memory consisting of two RTDs connected in series (Fig. 1) indicated equal number of attractors or attraction regions, and the number of stable singularities. Parameters related to parasitic capacitance and inductance (C1, C2 and L), did not correspond to the actual values on the chip. Results of analysis with real parasitic parameters on chip for the three-valued memory [15]–[18], four-valued memory [19] and five-valued memory [20] were published. The object of this paper is to analyse the sixvalued elemental memory formed of two RTDs connected in series

MULTIPLE-VALUED ELEMENTAL MEMORY

BOUNDARY SURFACE OF THE MV MEMORY

CONCLUSIONS