Analysis Of 4-Bit Absolute Value Detector for ECG Signal Comparation

Abstract

In the present era, where numerous heart conditions are prevalent, the significance of monitoring cardiac electrical signals has surged within the medical realm. Within this study, we leverage Complementary Metal Oxide Semiconductor (CMOS) and Pass-transistor Logic (PTL) methodologies for crafting and refining a 4-bit absolute value detection mechanism. This mechanism serves to identify and juxtapose electrocardiogram (ECG) signals. The 4-bit absolute value detection system is bifurcated into two core segments: one for absolute value identification and the other for comparative analysis. This setup facilitates a binary input's comparison with a predetermined threshold, thereby yielding a corresponding comparative outcome. Subsequently, a meticulous assessment is conducted on the lengthiest pathway, which is then subject to refinement through gate sizing and voltage supply (Vdd) adjustments. The findings unveil a delay of 34.13tp0 and an energy dissipation of 184.832 C. The resultant 4-bit absolute value detection mechanism, borne from this research institution's efforts, emerges as an invaluable asset in the medical domain, attributed to its exceptional optimization with respect to minimal delay and energy outlay.