Abstract
In this research, we sought to determine the optimal size of the current blocking layer (CBL) in a vertical light-emitting diode (V-LED) for maximized output power. As the area of the CBL increased, the amount of light generated from the active region in the V-LED decreased due to the increase in local current density in the active region; at the same time, the amount of light extracted from the V-LED chip increased due to minimized obstruction from the n-electrode. The total output power (product of the light generated from the active region and the light extracted from the chip) of a V-LED was calculated as the size of the CBL was varied and was found to be maximized when the size of the CBL was larger than that of the n-electrode. In a circular n-electrode with a diameter of 120 μm, the optimal size (diameter) of the CBL was found to be 220 μm; in a 3 × 3 mesh type n-electrode with a 20 μm stripe width, the optimal CBL was found to be 40 μm stripe width.
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