Analysis and Synthesis of a Digital Phase-Locked Loop for FM Demodulation

Abstract

A method of synthesizing a general nth order phase-locked loop is presented. In contrast to conventional phase-locked loops, the circuitry is digital rather than analog. The general circuit consists of an assembly of logic blocks (gates and storage elements) which, when driven by external clock signals, exhibits phase-locked loop properties. These properties, along with high stability and the absence of adjustments, make the digital phase-locked loop ideally suited for use in large systems which use monolithic integrated circuits for microminiaturization. Analysis and synthesis techniques make use of Z-transform methods in achieving the desired frequency response as the realization of an nth order difference equation. A general technique is developed and two specific cases, n = 1 and n = 2, are considered in detail. Analytic results relating to the phase-locked loop's static and dynamic performance are derived and found to correlate well with laboratory results for actual circuits.