Analysis and impacts of Negative Bias Temperature Instability (NBTI)

Abstract

As the Integrated Circuits (IC) density keeps on increasing with the scaling of CMOS devices in each successive technology generation, reliability concerns mainly Negative Bias Temperature Instability (NBTI) becomes a major challenge. NBTI degrades the performance of a PMOS transistor under a negative gate stress. The after effects of NBTI include: (a) threshold voltage increase of PMOS transistor, (b) drain current degradation, and (c) speed degradation. Elevated temperature and the negative gate stress play an important role in degradation of Gate Oxide which further degrades the above said parameters. Before any circuit design Stress Analysis becomes important for any device in order to get the complete performance of the circuit. Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper basically we have analysed the effect of temperature variations on NBTI for a buffer.