Analysis and design of differential LNAs with on-chip transformers in 65-nm CMOS technology

Abstract

An on-chip transformer, with two inductors magnetically coupled, provides input single-to-differential conversion (passive balun) for a differential low-noise amplifier (LNA), but significantly influences its input impedance and noise performance. We derive the analytical expressions for the performances of differential inductively-degenerated common-source (CS) LNA and cross-coupled common-gate (CG) LNA with on-chip transformers to present their design considerations. The derived expressions provide the minimum requirement for the quality factor of the inductor and the optimum inductance for the minimum noise figure (NF) of the LNA. Both the LNAs with inter-winding symmetric octagonal transformers are designed for Bluetooth Low Energy (BLE) receivers with a 65-nm CMOS process. Simulations show that the differential CS and CG LNAs achieve |S 21 | of 20.4 dB and 20.9 dB, and NF of 5.18 dB and 4.55 dB at 2.45 GHz, respectively, with a power consumption of 2.8 mW from a 0.7-V supply. The CG LNA can achieve a higher gain and lower NF than the CS one. The presented analysis and design considerations significantly reduce the design efforts to differential LNAs with on-chip transformers.