Analysis and Compensation of Dead-Time Effect in SiC-Device-based High-Switching-Frequency Inverters

Abstract

The ultra-fast-switching silicon carbide (SiC) devices enable power inverters to achieve extremely high switching frequencies (e.g. 100kHz). However, as a limiting factor at high switching frequencies, the dead-time of the conventional pulse width modulation (PWM) can cause serious low-frequency current/voltage harmonics and reduce the dc-link voltage utilization. It is timely to investigate the aggravated dead-time effect on the performance of high-switching-frequency inverters with the increasing application of wide-bandgap devices. In this paper, the dead-time effect and its compensation at high switching frequencies are investigated. The voltage loss and the maximum linear modulation index are derived considering both the dead-time and the switching frequency. The increased amplitude of modulation wave by the dead-time compensation is illustrated, indicating a significantly decreased linear modulation region in high-switching-frequency conditions. A dead-time elimination PWM scheme is therefore adopted, which is equivalent to the conventional PWM with dead-time compensation while has a larger linear modulation region but a slight lower efficiency. The efficiency difference can be very small or even negligible at high switching frequencies and high operating powers. The analyses are finally validated by the experimental results at 100kHz on a three-phase inverter with SiC MOSFETs and SiC Schottky diodes.