Analyses of Surface and Interfacial Layers in Polycrystalline <formula formulatype="inline"><tex Notation="TeX">$\hbox{Cu}_{2}\hbox{O}$</tex></formula> Thin-Film Transistors

Abstract

Effects of low temperature $({\hbox{300}}^{\circ}\hbox{C})$ annealing on $\hbox{Cu}_{2}\hbox{O}$ films were investigated by analyzing the film stacking structures with photoemission spectroscopy, X-ray reflectivity spectroscopy and spectroscopic ellipsometory in relation to $p$ -channel TFT characteristics and possible origins of trap states. The Hall mobility of optimum $\hbox{Cu}_{2}\hbox{O}$ films was ${\hbox{2.1}}~\hbox{cm}^{2}/(\hbox{V}{\cdot}\hbox{s})$ ; however, the bottom-gate $\hbox{Cu}_{2}\hbox{O}$ TFT exhibited a much lower field effect mobility of the order of 10 $^{-4}~\hbox{cm}^{2}/(\hbox{V}{\cdot}\hbox{s})$ and an on/off drain current ratio of 10 $^{3}$ . This work detected a surface layer and an interface layer in the $\hbox{Cu}_{2}\hbox{O}/~\hbox{SiO}_{2}$ samples, i.e., the surface layer included the $2+$ state of Cu ions that would form subgap hole trap states at the back channel region. In addition, the low-density layer at the $\hbox{Cu}_{2}\hbox{O}{\hbox{--}}\hbox{SiO}_{2}$ interface would produce extra interfacial trap states.