Analogue/RF performance attributes of underlap tunnel field effect transistor for low power applications

Abstract

Tunnel field effect transistor (TFET) is being considered as an alternative to the conventional MOSFETs for low power system on chip applications. In this Letter, gate-drain underlap (UL) feature of double gate TFET for analogue/RF characteristic is discussed. Here, it is found that parasitic resistance induced by gate drain UL is not significant as compared with DG tunnel field effect transistor (DG-FET). Thus, the behaviour of RF figure of merit is different from DG-FET.