Analog transient concurrent fault simulation with dynamic fault grouping

Abstract

Fast analog fault simulation is critical in test development and fault diagnosis for analog and mixed-signal circuits. It has been demonstrated that concurrent fault simulation methods can greatly reduce the computational complexity of analog fault simulation by sharing intermediate simulation results between different faults. In this paper we present an algorithm for dynamic fault grouping for transient fault simulation of nonlinear analog circuits. The goal of fault grouping in general is to minimize the total fault simulation running time for all faulty circuits while satisfying the simulation accuracy constraints. Fault grouping allows subset of faults with similar transient response characteristics to be simulated concurrently for a given test stimulus. Time step increments for each fault group are adaptively selected to limit simulation error while maximizing simulation concurrency. Results of simulation performance and statistics on test circuits are presented.