Analog Performance of SOI nFinFETs with Different TiN Gate Electrode Thickness

Abstract

This work presents an analysis of the analog performance of SOI FinFET devices and the impact of different TiN metal gate electrode thickness. Thinner TiN metal gate allows achieving large gain in spite of the reduced variation observed on gm/IDS characteristics. This effect can be attributed to the increased Early voltage values observed for thinner TiN metal gate. This VEA enhance suggests an increase of the transversal electrical field for thin TiN metal gate (reduced effective oxide thickness - EOT) that is confirmed with the increment of the GIDL current. This impact on the voltage gain is maintained for short channel length.