Abstract
In this paper, the analog performance of Bulk, DTMOS (Dynamic Threshold MOSFET - DT), BOI (Body-On-Insulator) and SOI (Silicon-On-Insulator) triple-gate devices is compared through three-dimensional numerical simulations. Furthermore, the impact of low temperature operation was also studied for different channel doping concentrations. The results indicate that DTMOS structures show the best analog performance for higher channel doping concentration at room temperature and they present a larger transistor efficiency (gm /ID) at all temperatures analyzed. In spite of the gm/ID improvement at low temperatures for all structures, the Early voltage and intrinsic voltage gain degrade for Bulk and DTMOS devices when the channel doping concentration is high. For lowly doped channels, the Early voltage and intrinsic voltage gain increase at lower temperature in all structures studied with a slight improvement for the SOI devices.
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