Analog Parameters of Strained Non-Rectangular Triple Gate FinFETs

Abstract

The strained silicon technology together to the reduction of the temperature is studied in this paper on trapezoidal triple gate FinFETs, through three-dimensional numerical simulation, with particular focus on analog parameters. The comparison of the intrinsic voltage gain between the different trapezoidal fin shapes demonstrated that, although the strained silicon technology provided higher intrinsic voltage gain, the fin shape can have a major role in analog parameters, helping to improve those parameters under certain circumstances. Higher intrinsic voltage gains were obtained for strained devices with top fin width larger than bottom.