Abstract
A novel method for analog constraints extraction is presented. In the proposed approach, analog circuits are represented as bipartite graphs, and then divided into two parts, bias part and signal part, composed of stages with respect to the signal flow analysis. Symmetry constraints are extracted by a graph isomorphism algorithm and so do matching constraints by primitive cell recognition with signal flow analysis. All the constraints are classified according to the critical level analysis by the topological, signal flow analysis and their intrinsic sensitivity. Examples drawn from industrial applications demonstrate the method is very effective and promising
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