Abstract

An X to K a -Band fully-integrated power amplifier (PA) designed with 8 stacked transistors is implemented in a 45 nm CMOS SOI technology. The stacked configuration allows the PA to deliver high output power over a wide bandwidth while each transistor is biased under low drain-source voltage. At 18 GHz, the PA under a bias supply of 9.6 V measures a saturated output power P SAT and linear output power P 1dB of 27 dBm (0.5 Watt) and 24.5 dBm, respectively, with a peak power-added efficiency PAE of 11.8%. For the frequencies measured from 10 to 32 GHz, the P SAT , and P 1dB are above 23.9 dBm and 18.8 dBm, respectively.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call