Abstract
In this paper, we demonstrate that high-quality-factor and low-power-loss transformers can be obtained if the partial pattern ground shields (PPGS) of polysilicon is adopted and the CMOS process compatible backside inductively-coupled-plasma (ICP) deep trench technology is used to selectively remove the silicon underneath the transformers. The results show that, if the PPGS was adopted and the backside ICP etching was done, a 90.6% (from 5.3 to 10.1) increase in Q-factor, a 10.8% (from 0.712 to 0.789) increase in magnetic-coupling factor (k Im ), a 21.5% (from 0.646 to 0.785) increase in maximum available power gain (G Amax ), and a 0.85 dB (from 1.90 dB to 1.05 dB) reduction in minimum noise factor (NF min ) were achieved at 5.7 GHz, respectively, for a bifilar transformer with an overall dimension of 230 × 215 μm2. These results demonstrate that the proposed combination of PPGS and backside ICP etching is very promising for 3–10 GHz ultrawideband (UWB) RF-ICs applications.
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