Abstract
In this paper, we compare the performance of symmetrical dual material double gate (SDMDG) SOI MOSFETs and asymmetrical dual material double gate (ADMDG) SOI MOSFETs. We investigate the influence of gate engineering on the analog performances of both the device structure for system-on-chip applications using a 2D device simulator (Silvaco TCAD). The gate engineering technique used here is the dual metal gate technology. The SDMDG structure shows better immunity to DIBL, near ideal Sub-threshold Slope (SS), high I on /I off ratio and improved analog performance like trans conductance generation factor, TGF (g m /I d ), output conductance (g d ).
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