An ultra‐linear CMOS image sensor for a high‐accuracy imaging system

Abstract

SummaryThis paper presents an ultra‐linear CMOS image sensor (CIS) which can be used in the high‐accuracy imaging system. A new technique has been introduced to implement unity gain buffer as an APS readout circuit. Moreover, to save power consumption and silicon area without losing speed, a column 10‐Bit SS‐ADC with built‐in correlated double sampling function is presented. Nonlinearity, dynamic range, total input referred readout noise, and power consumption for the proposed readout circuit are 0.08%, 49 dB, 5.05 μV, and 126 μW, respectively. The results indicate up to 12.5 times linearity and 15 times gain error are improved compared with a conventional SF readout. A 320 × 240 pixel CIS has been designed in the 0.18‐μm CMOS technology, and important results are provided.