An reconfigurable multiplier in GF(2/sup m/) for elliptic curve cryptosystem

Abstract

In this paper an efficient architecture of a reconfigurable bit-serial polynomial basis multiplier for Galois field GF(2/sup m/), where 1<m/spl les/M is proposed. The value of the field degree m can be changed and the irreducible polynomial can be configured and programmed. Comparing with previous designs, the advantages of the proposed architecture are (i) the high order of flexibility, which allows an easy configuration for arbitrary field degree m, and (ii) the low hardware complexity, which results in small area. The introduced multiplier was realized in FPGA and used in designing an Elliptic Curve Cryptosystem with remarkable results in terms of performance and area. Also, its efficiency in term of performance and area is proved through comparisons with existing GF(/sup 2/) multipliers.