An Optimum Design of the Carbon Nanotube Field Effect Transistor for Analog Applications in 10 nm Technology

Abstract

Complementary metal oxide semiconductor (CMOS) technology has encountered the challenges in scaling beyond 5 nm in recent years, hence, limiting further performance improvement. The carbon nanotube field-effect transistor (CNFET) has potential to replace the metal oxide semiconductor field effect transistor (MOSFET) due to its similar electrical properties and fabrication processes, with better performance. In this paper, we present an optimum design of a two-stage CNFET operational amplifier (op-amp) in 10 nm technology. The optimum design is achieved considering the analog performance metrics such as the open-loop gain, gain bandwidth, power dissipation, and output resistance. The structural parameters of the CNFET, the number of carbon nanotubes (CNTs) N, CNT diameter D CNT , and inter-CNT spacing S were altered and simulated against the performance metrics to observe the variation of the performance metrics. Based on the simulation results, higher value of structural parameters offers higher performances without at the cost of higher power dissipation. In this work, the achieved optimum value of N, D CNT , and S of 11, 1.7 nm, and 20 nm, respectively.