An optimization of 16-point Discrete Cosine Transform implemented into a FPGA as a design for a spectral 1<i>st</i> level surface detector trigger in the Pierre Auger Observatory

Abstract

The paper describes an optimization of 16-point Discrete Cosine Transform (DCT)algorithm implemented into a FPGA. Widely used for long-term numerical calculation 8-point algorithm of Arai-Agui-Nakajima, which minimized an amount of multiplication, is not optimal for the FPGA implementation. For new FPGA chips with large amount of fast multipliers located in embedded digital signal processing (DSP)blocks the number of multiplication is not a critical parameter. The registered performance and a total speed can be significantly increased by a parallel signal processing in DSP blocks. A lack of proper routines in Altera ’s Library of Parameterized Modules (LPM)and a necessity of using shift registers for processes synchronization in a pipeline data flow additionally impose a factorization focused on wider use of DSP blocks and a reduction of a length of pipeline chains. The DCT algorithm optimization was a result of work on new spectral trigger designs for the Pierre Auger surface detectors based on the 16-point DCT. The DCT trigger allows recognition of FADC traces with a very short rise time and fast exponential attenuation related to a narrow, flat muon component of very inclined Extensive Air Showers generated by hadron and starting their development early in the atmosphere.