Abstract
n-channel enhancement/depletion (E/D) gate MOS ring-oscillators (RO) based on 1.3- and 2-µm layout design rules have been fabricated using 10:1 reduction projection aligner. A delay/stage of 80 ps and a power-delay product of 3.6 fJ have been obtained for a 401-stage RO consisting of 1.3-µm feature-size devices.
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