Abstract
We use predictive technology computer-aided design to investigate the device design challenges and optimization issues that will be necessarily encountered in scaling of complementary silicon-germanium (C-SiGe) heterojunction bipolar transistors (HBTs). A fully integrated simulation framework was developed to design and optimize device doping and Ge profiles for any given target performance, using important circuit-relevant figures-of-merit. This methodology was successfully utilized to realize device profiles for multiple C-SiGe technology nodes within the context of a C-SiGe scaling roadmap. A method for optimizing the ac performance of SiGe HBTs geared for both high-performance and low-power applications is also presented. The performance metrics of the optimized profiles presented here are then compared with those of existing fabricated devices reported in the literature.
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