Abstract

With the continuously progress of integrated circuits, the dependability of computing, caused by soft errors, has become a growing design concern. For mitigating the effects of soft errors, software-based fault tolerance techniques are attractive because of their low costs and flexibility. But current researches mostly focus on error detection, and available error recovery methods generally provoke significant memory overhead and performance degradation, which will be prohibitively high for low-end systems. In this paper, we present an instruction-level fine-grained recovery approach named FASER, to detect and correct soft errors with minimal costs. The liveness of registers are firstly analyzed through the assembly code of the target program. Based on SWIFT, an instruction-level error detecting method, FASER presents the concrete implementation of checkpoint and recovery process at the granularity of storeless basic blocks. And we also propose several optimization measures for improving performance. The experimental results indicate that averagely 99.41% detected errors are successfully recovered by FASER. And on the basis of error detection, only additional 5.38% performance overhead is introduced, which is very low comparing with available methods.

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