Abstract
An Instruction Systolic Array (ISA) implementation of the two-dimensional Fast Fourier Transform (FFT) algorithm is presented in this paper. The ISA is characterised by a systolic flow of instructions instead of data as in ordinary systolic array. The ISA implementation of the two-dimensional FFT algorithm is derived following a systematic design methodology. The derived ISA for the two-dimensional FFT is modular and uses identical processing elements, with local and regular interconnections among the processing elements. For a √ N × √ N point two-dimensional FFT, the time-complexity of the proposed ISA design is O(√ fN) with N processing elements.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
