An Insight into Temperature Inversion Using [formula omitted]-Power MOSFET Model for Ultradeep Submicron Digital CMOS Technologies

Abstract

When digital circuits are designed, it is generally accepted that the circuit delay will rise by reducing supply voltage and increasing temperature. It is well known that this presumption breaks when the supply voltage is low and the delay decrease with rise in temperature. This is due to the mutual compensation of physical parameters that change with temperature. This phenomenon is known as inverse temperature dependence (ITD) and the supply voltage at which this occur is known as Temperature Inversion Voltage (TIV) or crossover voltage. In this paper, an α-power law based unified (valid in all inversion/saturation regions) analytical MOSFET model is utilized to study the phenomenon of ITD for basic digital building blocks in order to have first hand estimation of TIV up to 22 nm technology node. The results obtained are verified with industry standard BSIM3v3 up to 100 nm and BSIM4 below 100 nm.