Abstract

A 1-bit full adder (FA) is an important circuit block of many digital CMOS VLSI sub-systems, and its performance is input dependent. Input test patterns play a crucial role in the characterization and analysis of any circuit, including: measurement of propagation delay, estimation of power dissipation and functional verification. An improved input test pattern consisting of two sets (primary and supporting) is proposed in this paper. Each set consists of all 57 possible input transitions, including the transitions that lead to maximum propagation delay. Our input test pattern is designed such that, any individual FA within the n-bit ripple carry adder (RCA) can be forced to all 56 possible input transitions for measurement of maximum propagation delay, estimation of fair power dissipation and functional verification. The propagation delay of a n-bit RCA is a function of carry propagation (through all n FAs). Our input test pattern also contains 18 input transitions for which carry is propagated through all n FAs of the n-bit RCA. First, our proposed (primary) input test pattern is applied to seven FAs (based on different circuits/logic-styles). The simulation results show that our proposed input test pattern provides comparable/correct estimates of maximum propagation delay and power dissipation, using less number of input transitions as compared to other patterns reported earlier. Next, as an example of n-bit adder, we build a 4-bit RCA, and all the individual FAs within this RCA are also characterized, using our proposed (primary and supporting) input test pattern. The simulation results indicate that propagation delay and power dissipation characteristics of individual FAs within the RCA vary, and are also a function of the particular FA circuit/logic-style used to build the RCA. Simulations are also done to measure carry propagation delay (through all n FAs) of the RCA. Simulation results prove that our 18 input transitions provides the correct estimation of carry propagation delay as compared to the conventional method.

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