Abstract
This work analytically formulates the relationship among the followings for characterization purpose: (i) γE (injection efficiency), (ii) excess charge stored during on-state and (iii) charge extraction rate and voltage ramp before punch-through during the turn-off. Injection efficiency is expressed in terms of JR (reference current density), Jb (buffer layer reference current), and JT (terminal current). Both JR and Jb are lumped parameters and can be extracted without any knowledge of parameters in the emitter and buffer layer. While γE is simply the ratio of minority to total current, injection capacity is defined mathematically in this work as an index of the tendency of the excess carriers being injected from emitter and then stored in the drift region. 4H-SiC p- and n-IGBT will be discussed side-by-side throughout the discussion. The adaptability of this injection efficiency model will be examined under different emitter conditions and buffer layer lifetimes. This work is also applicable to silicon devices.
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