An improved seven-phase SVPWM modulation strategy based on virtual voltage vectors

Abstract

Seven-phase motors are usually powered by seven-phase voltage source inverter. The traditional seven-phase SVPWM algorithm produces a large common-mode voltage (CMV), while harmonic currents in the harmonic subspace can also produce large harmonic losses in motor. The CMV is usually reduced by deprecating the zero-vector method, but the complexity of the computation is complicated by increasing the number of phases. In order to reduce the amount of computation while reducing the harmonic currents and weakening CMV, an improved seven-phase SVPWM algorithm based on virtual voltage vector method to weaken CMV was proposed. First, the time of action of each vector was calculated by adding one constraints. Then, the virtual voltage vectors were constructed by the outermost vectors in the fundamental subspace by comparing the advantages and disadvantages of each voltage vector group. Finally, the reference voltage vectors were constructed by the virtual voltage vectors. Simulation models were built to compare and verify accuracy of proposed SVPWM algorithm.