An improved low power CMOS readout circuit for focal plane array

Abstract

An improved low power CMOS snapshot readout structure called OESCA (Odd-Even Snapshot Charge Amplifier) for focal plane array (FPA) is presented in this paper. Using two low power charge amplifiers as column readout circuit (one is for the odd-row readout and the other is for the even-row), this structure not only can eliminate the influence of column bus parasitic capacitance, but also can save 15% power dissipation of the column readout stage. The pixel circuit includes only three NMOSFETs. Thus, it is very suitable for large-format small-pixel lower-power readout circuit. An experimental 64/spl times/64 OESCA chip has been fabricated with 1.2-/spl mu/m Double-Poly Double-Metal (DPDM) n-well CMOS technology. The charge handling capacity is 10.37 pC with pixel size 50/spl times/50 /spl mu/m/sup 2/. A description of the readout circuit structure, pixel circuit, operation principle is given in detail. Both excellent simulation results and experimental results of the fabricated OESCA readout chip are presented.