Abstract
AbstractMulti‐stage operational amplifiers are considered as basic building blocks in modern electronics since advanced Complementary metal–oxide–semiconductor (CMOS) technology limits exploiting cascode structures due to suffering from low voltage swings and the need of high gain capability. In this regard, an improved and high‐performance three‐stage CMOS amplifier is proposed in this work. The presented structure modeled mathematically and simulated via HSPICE circuit simulator with the 0.18‐μm CMOS technology. An straightforward symbolic calculation is explained to obtain linear transfer function. According to the simulation results, the proposed circuit show 149 dB as DC gain while express 7.3 MHz and 380 μW as gain‐bandwidth product and power dissipation, respectively. Such a high‐performance amplifier has great potential to realize more complex analog and mixed mode signal systems such as modulators and data convertors.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
