An Improved Comparator Based on Current Reuse and a New Frequency Compensation Technique used in an OTA for Pipeline ADCs

Abstract

In this paper, a comparator and an operational amplifier considered as essential components, constituting a 10-bit 50-MHz pipeline Analog-to-Digital Converter for Wireless Local Area Network (WLAN) applications, are described and designed. All post-layout and Monte-Carlo simulations, using a 0.35[Formula: see text][Formula: see text]m CMOS AMS process technology with [Formula: see text][Formula: see text]V supply voltage and an input common-mode range of [Formula: see text][Formula: see text]V, are achieved. An improved clocked comparator with a dynamic latch, based on a switched capacitor network, using the current reuse technique for slew rate enhancement and positive feedback for offset voltage compensation, is presented. The operational amplifier, consisting of a fully differential folded cascode operational transconductance amplifier, providing high-gain and good stability, is exhibited. A new frequency compensation technique, based on active resistors, is used to improve amplifier phase-margin. The Monte-Carlo performance results of the designed clocked comparator provide an offset voltage of [Formula: see text][Formula: see text]mV with [Formula: see text][Formula: see text]mV 3[Formula: see text] deviation, a slew rate of [Formula: see text]V/ns with [Formula: see text]V/ns 3[Formula: see text] deviation, and a propagation delay of [Formula: see text][Formula: see text]ns with [Formula: see text][Formula: see text]ns 3[Formula: see text] deviation. Monte-Carlo performance results of the designed operational amplifier provide a phase-margin of [Formula: see text], and a high-gain of [Formula: see text]dB with [Formula: see text] and [Formula: see text]dB 3[Formula: see text], respectively, by using [Formula: see text] load capacitance.