Abstract
A modified architecture of a comparator to achieve high slew rate and boosted gain with an improvement in gain design error is introduced and investigated in this manuscript. It employs the conventional architecture of common-mode current feedback with the modified gain booster topology to increase gain, slew rate, and reduced gain error from the conventional structure. Observation from the simulation results concludes that the modified structure using 24 transistors shows power dissipation of 362.29 μW in 90 nm CMOS technology by deploying a supply voltage of 0.7 V, which is a 70% reduction as compared to the usual common mode feedback (CMFD) structure. The symmetric slew rate of 839.99 V/µs for both charging and discharging is obtained, which is 173% more than the standard CMFD structure. A reduction of 0.61% in gain error is achieved through this architecture. A SPICE simulation tool based on 90 nm CMOS technology is employed for executing the Monte Carlo simulations. A brief comparison with earlier CMFD structures shows improved performance parameters in terms of power consumption and slew rate with the reduction in gain error.
Highlights
One of the most significant and critical elements of analog integrated circuits are comparators [1,2].Comparators play a pivotal role in regulating the decisive parameters of many imperative analog and digital circuits [3]
Monte Carlo simulations have been performed by using SPICE in 90 nm complementary mosfet technology (CMOS) technology
Results from the simulations depict that the observed and design gain is almost equal for the common mode feedback (CMFD)-gain boosting (GB) comparator with the value of 12.93 decibels
Summary
One of the most significant and critical elements of analog integrated circuits are comparators [1,2]. The op-amp comparators designed under such CMOS technologies with restrained supply voltage will not be able to comply with the designer requisites and, adversely affect the performance parameters of abstract circuits that employ these comparators as their core element [10]. Data converters, such as ADC and DAC conversion speed and accuracy, sturdily depend upon the comparator’s capability to detect the smallest voltage levels [11,12]. The paper and [20,21,22,23], which utilize mode common modefeedback current feedback tables and graphs
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