Abstract

Digital scan conversion (DSC) and speckle reduction imaging (SRI) are basic back-end units of an ultrasound imaging system. In a B-mode ultrasonography (USG) system, DSC is necessary to display a two dimensional image of a tissue structure. Speckle noise, present in an USG system, affects the quality of images observed. Moreover, motion blurring is observed while examining non-stationery organs like the heart. To address these issues, a high speed VLSI design of the USG back-end unit is presented in this paper. The back-end is designed in such a way that it can be integrated with the front-end of the USG system. An FPGA platform is used to prototype these units. Massive usage of the parallel-pipelining technique has helped in achieving high throughput at low power. The DSC architecture operates at 14.66 MHz and is capable of scan converting 132 raw frames per second. Similarly, the SRI unit operates at 221 MHz and is capable of de-speckling images of size 640 × 480 at 698 fps. Therefore, it is possible to investigate objects without motion blur using these units. System level integration issues of the DSC---SRI units are also covered in this paper.

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